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ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 1 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
ASPDAC
2007
ACM
105views Hardware» more  ASPDAC 2007»
15 years 1 months ago
An Efficient Computation of Statistically Critical Sequential Paths Under Retiming
Abstract-- In this paper we present the Statistical Retimingbased Timing Analysis (SRTA) algorithm. The goal is to compute the timing slack distribution for the nodes in the timing...
Mongkol Ekpanyapong, Xin Zhao, Sung Kyu Lim
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
15 years 6 months ago
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
Anirudh Devgan, Chandramouli V. Kashyap
ASPDAC
2008
ACM
200views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Non-Gaussian statistical timing analysis using second-order polynomial fitting
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...
Lerong Cheng, Jinjun Xiong, Lei He
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 3 months ago
Use of statistical timing analysis on real designs
A vast literature has been published on Statistical Static Timing Analysis (SSTA), its motivations, its different implementations and their runtime/accuracy trade-offs. However, v...
A. Nardi, Emre Tuncer, S. Naidu, A. Antonau, S. Gr...