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IJNM
2008
103views more  IJNM 2008»
15 years 1 months ago
An efficient architecture for Bandwidth Brokers in DiffServ networks
In this article we examine the architecture of an entity used for automatic management and provisioning of resources for DiffServ networks. We examine the existing literature and ...
Christos Bouras, Kostas Stamos
TVLSI
2008
117views more  TVLSI 2008»
15 years 1 months ago
Configurable VLSI Architecture for Deblocking Filter in H.264/AVC
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result s...
Chung-Ming Chen, Chung-Ho Chen
CPHYSICS
2006
95views more  CPHYSICS 2006»
15 years 2 months ago
Multibillion-atom molecular dynamics simulation: Design considerations for vector-parallel processing
Progress in adapting molecular dynamics algorithms for systems with short-range interactions to utilize the features of modern supercomputers is described. Efficient utilization o...
D. C. Rapaport
109
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IJPP
2011
99views more  IJPP 2011»
14 years 8 months ago
Regular Lattice and Small-World Spin Model Simulations Using CUDA and GPUs
Data-parallel accelerator devices such as Graphical Processing Units (GPUs) are providing dramatic performance improvements over even multicore CPUs for lattice-oriented applicatio...
Kenneth A. Hawick, Arno Leist, Daniel P. Playne
DSRT
2008
IEEE
15 years 3 months ago
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture
Most common real-time embedded programming languages provide a means to specify functionality; however, they have few constructs to specify precise timing constraints. LabVIEW is ...
Shanna-Shaye Forbes, Hiren D. Patel, Edward A. Lee...