3395 search results - page 642 / 679 » Circuit-aware architectural simulation |
DAC
2004
ACM
15 years 10 months ago
2004
ACM
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
timing analysis tools to replace standard deterministic static timing analyzers whereas [8,27] develop approaches for the statistical estimation of leakage power considering within...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...