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    HPCA
    2009
    IEEE
    151views Distributed And Parallel Com...» more  HPCA 2009»
    iCFP: Tolerating all-level cache misses in in-order processors
    15 years 10 months ago
    iCFP: Tolerating all-level cache misses in in-order processors
    Download  www.seas.upenn.edu
    Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
    Andrew D. Hilton, Santosh Nagarakatte, Amir Roth
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    MOBIHOC
    2009
    ACM
    258views Computer Networks» more  MOBIHOC 2009»
    Admission control and scheduling for QoS guarantees for variable-bit-rate applications on wireless channels
    15 years 10 months ago
    Admission control and scheduling for QoS guarantees for variable-bit-rate applications on wireless channels
    Download  decision.csl.illinois.edu
    Providing differentiated Quality of Service (QoS) over unreliable wireless channels is an important challenge for supporting several future applications. We analyze a model that h...
    I-Hong Hou, P. R. Kumar
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    MOBIHOC
    2009
    ACM
    261views Computer Networks» more  MOBIHOC 2009»
    Aging rules: what does the past tell about the future in mobile ad-hoc networks?
    15 years 10 months ago
    Aging rules: what does the past tell about the future in mobile ad-hoc networks?
    Download  www4.ncsu.edu
    The study in mobile ad-hoc networks (MANET) is facing challenges brought by recent discovery of non-exponential behavior of the inter-contact time distribution of mobile nodes. In...
    Han Cai, Do Young Eun
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    VLSID
    2008
    IEEE
    150views VLSI» more  VLSID 2008»
    PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
    15 years 10 months ago
    PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
    Download  www.public.asu.edu
    Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
    Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
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    VLSID
    2004
    IEEE
    147views VLSI» more  VLSID 2004»
    Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
    15 years 10 months ago
    Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
    Download  research.synopsys.com
    Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
    Shabbir H. Batterywala, Narendra V. Shenoy
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