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ASPDAC
2010
ACM
637views Hardware» more  ASPDAC 2010»
14 years 7 months ago
A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography
As Double Patterning Lithography(DPL) becomes the leading candidate for sub-30nm lithography process, we need a fast and lithography friendly decomposition framework. In this pape...
Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, D...
GLOBECOM
2010
IEEE
14 years 7 months ago
Column Generation for Dimensioning Resilient Optical Grid Networks with Relocation
Nowadays, the Quality of Service (QoS) in Optical Grids has become a key issue. An important QoS factor is the resiliency, namely the ability to survive from certain network failur...
Brigitte Jaumard, Jens Buysse, Ali Shaikh, Marc De...
GLOBECOM
2010
IEEE
14 years 7 months ago
An Experimental Comparison of Burst Packet Transmission Schemes in IEEE 802.11-Based Wireless Mesh Networks
Abstract--Wireless mesh networks (WMNs) are wireless multihop networks comprised of mesh routers, which relay traffic on behalf of clients and other nodes. Using the standard IEEE ...
Peter Dely, Andreas Kassler, Nico Bayer, Dmitry Si...
INFOCOM
2010
IEEE
14 years 7 months ago
Distributed Coordination with Deaf Neighbors: Efficient Medium Access for 60 GHz Mesh Networks
Multi-gigabit outdoor mesh networks operating in the unlicensed 60 GHz "millimeter (mm) wave" band, offer the possibility of a quickly deployable broadband extension of t...
Sumit Singh, Raghuraman Mudumbai, Upamanyu Madhow
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
15 years 2 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...