191 search results - page 16 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
ISQED
2007
IEEE
15 years 3 months ago
2007
IEEE
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
ICCAD
1996
IEEE
15 years 1 months ago
1996
IEEE
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
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ASAP
2005
IEEE
15 years 3 months ago
2005
IEEE
CAD tools have become more and more important for integrated circuit (IC) design since a complicated system can be designed into a single chip, called system-on-a-chip (SOC), in w...
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Exc...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...