191 search results - page 17 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
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VLSID
2002
IEEE
15 years 2 months ago
2002
IEEE
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
VLSID
2006
IEEE
15 years 9 months ago
2006
IEEE
This article describes a standard cell based novel implementation of a low-power Viterbi Decoder (VD) targeted for the IEEE 802.11a Wireless LAN system. Multiple clock rates have ...
74
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ISPD
2003
ACM
15 years 2 months ago
2003
ACM
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
89
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ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...