191 search results - page 19 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
This paper presents a design methodology that was applied to the design of a 2.4GHz dual-core SPARC64TM microprocessor with 90nm CMOS technology. It focuses on the newly adopted t...
TCAD
2008
14 years 9 months ago
2008
Abstract--Advances in very large-scale integration technology make clock skew more susceptible to process variations. Notwithstanding efficient exact zero-skew algorithms, clock sk...
ISSS
1998
IEEE
15 years 1 months ago
1998
IEEE
With the decreasing feature sizes during VLSI fabrication and the dominance of interconnect delay over that of gates, control logic and wiring no longer have a negligible impact o...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
—On-chip power distribution grids with multiple supply voltages are discussed in this paper. Two types of interdigitated and paired power distribution grids with multiple supply ...
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GLVLSI
2009
IEEE
14 years 7 months ago
2009
IEEE
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...