191 search results - page 28 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
LCN
2003
IEEE
15 years 2 months ago
2003
IEEE
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
ISPD
2005
ACM
15 years 3 months ago
2005
ACM
With increase of clock frequency, on-chip wire inductance starts to play an important role in power/ground distribution analysis, although it has not been considered so far. We pe...
124
click to vote
ISPD
2012
ACM
13 years 5 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
— Modern sub-micron VLSI designs include huge power grids that are required to distribute large amounts of current, at increasingly lower voltages. The resulting voltage drop on ...