191 search results - page 33 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
FCCM
2004
IEEE
15 years 1 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
We perform a detailed study of various crosstalk scenarios in VDSM technologies by using a distributed model of the crosstalk site and make a number of key observations about the ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
DSD
2002
IEEE
15 years 2 months ago
2002
IEEE
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
ISPD
2003
ACM
15 years 2 months ago
2003
ACM
The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partitio...