Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is primarily due to the difficulty in predicting these ...
We discuss the design of multi-dimensional tender and auction mechanisms that combine Data Envelopment Analysis (DEA) and auction theory. The mechanisms select an agent to perform...
An overview of the classification-based least squares trained filters on picture quality improvement algorithms is presented. For each algorithm, the training process is unique and...
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...
Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy,...
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...
Jaskirat Singh, Zhi-Quan Luo, Sachin S. Sapatnekar