Sciweavers

3956 search results - page 734 / 792
» Clustera: an integrated computation and data management syst...
Sort
View
GRID
2004
Springer
15 years 3 months ago
Hybrid Preemptive Scheduling of MPI Applications on the Grids
— Time sharing between all the users of a Grid is a major issue in cluster and Grid integration. Classical Grid architecture involves a higher level scheduler which submits non o...
Aurelien Bouteiller, Hinde-Lilia Bouziane, Thomas ...
ISCA
2010
IEEE
210views Hardware» more  ISCA 2010»
15 years 2 months ago
An intra-chip free-space optical interconnect
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their performance, functionality, and hence, complexity. Simultaneously, relentless s...
Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun ...
CONEXT
2009
ACM
14 years 11 months ago
Detecting network neutrality violations with causal inference
We present NANO, a system that detects when ISPs apply policies that discriminate against specific classes of applications, users, or destinations. Existing systems for detecting ...
Muhammad Mukarram Bin Tariq, Murtaza Motiwala, Nic...
ICS
1999
Tsinghua U.
15 years 2 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
POPL
2010
ACM
14 years 8 months ago
S-Net for multi-memory multicores
S-NET is a declarative coordination language and component technology aimed at modern multi-core/many-core architectures and systems-on-chip. It builds on the concept of stream pr...
Clemens Grelck, Jukka Julku, Frank Penczek