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» Co-Scheduling Hardware and Software Pipelines
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FPL
2008
Springer
180views Hardware» more  FPL 2008»
15 years 3 months ago
Compiled hardware acceleration of Molecular Dynamics code
The objective of Molecular Dynamics (MD) simulations is to determine the shape of a molecule in a given biomolecular environment. These simulations are very demanding computationa...
Jason R. Villarreal, Walid A. Najjar
117
Voted
VIP
2001
15 years 3 months ago
High-speed Parameterisable Hough Transform Using Reconfigurable Hardware
Recent developments in reconfigurable hardware technologies have offered high-density high-speed devices with the ability for custom computing whilst maintaining the flexibility o...
Dixon D. S. Deng, Hossam A. ElGindy
104
Voted
ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
15 years 10 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
IOLTS
2007
IEEE
110views Hardware» more  IOLTS 2007»
15 years 8 months ago
An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding
In this paper we present an efficient design technique for implementing the Elliptic Curve Cryptographic (ECC) Scheme in FPGAs. Our technique is based on a novel and efficient i...
Osama Al-Khaleel, Christos A. Papachristou, Franci...
126
Voted
HPCA
2004
IEEE
16 years 2 months ago
Creating Converged Trace Schedules Using String Matching
This paper focuses on generating efficient software pipelined schedules for in-order machines, which we call Converged Trace Schedules. For a candidate loop, we form a string of t...
Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, B...