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» Co-Scheduling Hardware and Software Pipelines
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113
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FPL
2006
Springer
96views Hardware» more  FPL 2006»
15 years 5 months ago
High Speed Document Clustering in Reconfigurable Hardware
High-performance document clustering systems enable similar documents to automatically self-organize into groups. In the past, the large amount of computational time needed to clu...
G. Adam Covington, Charles L. G. Comstock, Andrew ...
VISUALIZATION
2005
IEEE
15 years 7 months ago
The Visible Radio: Process Visualization of a Software-Defined Radio
In this case study, a data-oriented approach is used to visualize a complex digital signal processing pipeline. The pipeline implements a Frequency Modulated (FM) Software-Defined...
Matthew Hall, Alex Betts, Donna Cox, David Pointer...
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
15 years 8 months ago
Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform
— Multiprocessors on a chip are the reality of these days. Semiconductor industry has recognized this approach as the most efficient in order to exploit chip resources, but the ...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
120
Voted
WCET
2010
14 years 11 months ago
METAMOC: Modular Execution Time Analysis using Model Checking
Safe and tight worst-case execution times (WCETs) are important when scheduling hard realtime systems. This paper presents METAMOC, a modular method, based on model checking and s...
Andreas E. Dalsgaard, Mads Chr. Olesen, Martin Tof...
100
Voted
DATE
2006
IEEE
115views Hardware» more  DATE 2006»
15 years 8 months ago
Optimal periodic testing of intermittent faults in embedded pipelined processor applications
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...
Nektarios Kranitis, Andreas Merentitis, N. Laoutar...