169 search results - page 28 / 34 » Co-Scheduling Hardware and Software Pipelines |
158
Voted
ISVLSI
2005
IEEE
15 years 7 months ago
2005
IEEE
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
81
Voted
ARITH
1993
IEEE
15 years 6 months ago
1993
IEEE
We detail and analyse the critical techniques which may be combined in the design of fast hardware for RSA cryptography: chinese remainders, star chains, Hensel's odd divisio...
137
Voted
IPPS
2003
IEEE
15 years 7 months ago
2003
IEEE
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
127
Voted
CVPR
1998
IEEE
16 years 3 months ago
1998
IEEE
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
HPCA
2008
IEEE
16 years 2 months ago
2008
IEEE
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...