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ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
15 years 6 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
PAMI
2006
141views more  PAMI 2006»
14 years 9 months ago
Diffusion Maps and Coarse-Graining: A Unified Framework for Dimensionality Reduction, Graph Partitioning, and Data Set Parameter
We provide evidence that non-linear dimensionality reduction, clustering and data set parameterization can be solved within one and the same framework. The main idea is to define ...
Stéphane Lafon, Ann B. Lee
CASES
2010
ACM
14 years 8 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
CASES
2001
ACM
15 years 1 months ago
A new method for compiling schizophrenic synchronous programs
Synchronous programming languages have proved to be advantageous for designing software and hardware for embedded systems. Despite their clear semantics, their compilation is rema...
K. Schneider, M. Wenz
CODES
2008
IEEE
14 years 11 months ago
A performance-oriented hardware/software partitioning for datapath applications
This article proposes a hardware/software partitioning method targeted to performance-constrained systems for datapath applications. Exploiting a platform based design, a Timed Pe...
Laura Frigerio, Fabio Salice