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GLVLSI
2008
IEEE
169views VLSI» more  GLVLSI 2008»
14 years 9 months ago
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
This paper proposes a hybrid memory architecture which consists of the following two regions; 1) a dynamic power conscious region which uses low Vdd and Vth and 2) a static power ...
Tadayuki Matsumura, Tohru Ishihara, Hiroto Yasuura
ICMCS
2006
IEEE
136views Multimedia» more  ICMCS 2006»
15 years 3 months ago
Architecture Analysis for Low-Delay Video Coding
Low-delay video coding is a key technology for video conferencing as well as upcoming remote-monitoring and automotive video applications like rear-view cameras or night vision sy...
Ralf M. Schreier, A. Tushar Iqbal Rahman, Ganesh K...
ISSS
2000
IEEE
123views Hardware» more  ISSS 2000»
15 years 2 months ago
Source Code Optimization and Profiling of Energy Consumption in Embedded Systems
Tajana Simunic, Giovanni De Micheli, Luca Benini, ...
TECS
2008
65views more  TECS 2008»
14 years 9 months ago
A design framework for real-time embedded systems with code size and energy constraints
Sheayun Lee, Insik Shin, Woonseok Kim, Insup Lee, ...