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ICS
2001
Tsinghua U.
15 years 2 months ago
Global optimization techniques for automatic parallelization of hybrid applications
This paper presents a novel technique to perform global optimization of communication and preprocessing calls in the presence of array accesses with arbitrary subscripts. Our sche...
Dhruva R. Chakrabarti, Prithviraj Banerjee
PLDI
2003
ACM
15 years 3 months ago
A provably sound TAL for back-end optimization
Typed assembly languages provide a way to generate machinecheckable safety proofs for machine-language programs. But the soundness proofs of most existing typed assembly languages...
Juan Chen, Dinghao Wu, Andrew W. Appel, Hai Fang
IEEEPACT
2002
IEEE
15 years 2 months ago
A Framework for Parallelizing Load/Stores on Embedded Processors
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
Xiaotong Zhuang, Santosh Pande, John S. Greenland ...
AIPS
2009
14 years 11 months ago
Flexible Execution of Plans with Choice
Dynamic plan execution strategies allow an autonomous agent to respond to uncertainties while improving robustness and reducing the need for an overly conservative plan. Executive...
Patrick R. Conrad, Julie A. Shah, Brian C. William...
CODES
2007
IEEE
15 years 4 months ago
Predator: a predictable SDRAM memory controller
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
Benny Akesson, Kees Goossens, Markus Ringhofer