133 search results - page 8 / 27 » Code Generation: On the Scheduling of DAGs Using Worm-Partit... |
ICC
2007
IEEE
15 years 4 months ago
2007
IEEE
— Low-Density Parity-Check (LDPC) codes are usually decoded by running an iterative belief-propagation, or message-passing, algorithm over the factor graph of the code. The tradi...
TIT
2008
14 years 9 months ago
2008
Abstract--Low-Density Parity-Check (LDPC) codes are usually decoded by running an iterative belief-propagation algorithm over the factor graph of the code. In the traditional messa...
ICS
1995
Tsinghua U.
15 years 1 months ago
1995
Tsinghua U.
In this paper we give a new run–time technique for finding an optimal parallel execution schedule for a partially parallel loop, i.e., a loop whose parallelization requires syn...
AOSD
2007
ACM
15 years 1 months ago
2007
ACM
Achieving sufficient execution performance is a challenging goal of software development. Unfortunately, violating performance requirements is often revealed at a late stage of th...
CGO
2004
IEEE
15 years 1 months ago
2004
IEEE
Instruction scheduling hardware can be simplified and easily pipelined if pairs of dependent instructions are fused so they share a single instruction scheduling slot. We study an...