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PLDI
1995
ACM
15 years 8 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
EICS
2011
ACM
14 years 8 months ago
Hayaku: designing and optimizing finely tuned and portable interactive graphics with a graphical compiler
Although reactive and graphically rich interfaces are now mainstream, their development is still a notoriously difficult task. This paper presents Hayaku, a toolset that supports...
Benjamin Tissoires, Stéphane Conversy
CODES
2007
IEEE
15 years 11 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
146
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EGH
2005
Springer
15 years 10 months ago
Optimal automatic multi-pass shader partitioning by dynamic programming
Complex shaders must be partitioned into multiple passes to execute on GPUs with limited hardware resources. Automatic partitioning gives rise to an NP-hard scheduling problem tha...
Alan Heirich
ICCNMC
2005
Springer
15 years 10 months ago
Simplified Message Transformation for Optimization of Message Processing in 3G-324M Control Protocol
3G-324M is a multimedia transmission protocol designed for 3G communication environment. Meanwhile H.245 standard is a control protocol in 3G-324M and gives specific descriptions a...
Man-Ching Yuen, Ji Shen, Weijia Jia, Bo Han