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ISCA
2006
IEEE
131views Hardware» more  ISCA 2006»
15 years 9 months ago
Reducing Startup Time in Co-Designed Virtual Machines
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
Shiliang Hu, James E. Smith
CEC
2005
IEEE
15 years 9 months ago
A quantitative approach for validating the building-block hypothesis
The building blocks are common structures of high-quality solutions. Genetic algorithms often assume the building-block hypothesis. It is hypothesized that the high-quality solutio...
Chatchawit Aporntewan, Prabhas Chongstitvatana
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
15 years 9 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
IPPS
2003
IEEE
15 years 9 months ago
SPMD Image Processing on Beowulf Clusters: Directives and Libraries
Most image processing algorithms can be parallelized by splitting parallel loops and by using very few communication patterns. Code parallelization using MPI still involves much p...
Paulo F. Oliveira, J. M. Hans du Buf
MSR
2009
ACM
15 years 8 months ago
MapReduce as a general framework to support research in Mining Software Repositories (MSR)
Researchers continue to demonstrate the benefits of Mining Software Repositories (MSR) for supporting software development and research activities. However, as the mining process...
Weiyi Shang, Zhen Ming Jiang, Bram Adams, Ahmed E....