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CODES
2002
IEEE
15 years 8 months ago
Compiler-directed customization of ASIP cores
This paper presents an automatic method to customize embedded application-specific instruction processors (ASIPs) based on compiler analysis. ASIPs, also known as embedded soft c...
T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua
MICRO
2002
IEEE
159views Hardware» more  MICRO 2002»
15 years 8 months ago
Master/slave speculative parallelization
Master/Slave Speculative Parallelization (MSSP) is an execution paradigm for improving the execution rate of sequential programs by parallelizing them speculatively for execution ...
Craig B. Zilles, Gurindar S. Sohi
GPCE
2009
Springer
15 years 8 months ago
A language and framework for invariant-driven transformations
This paper describes a language and framework that allow coordinated transformations driven by invariants to be specified declaratively, as invariant rules, and applied automatic...
Yanhong A. Liu, Michael Gorbovitski, Scott D. Stol...
PADO
2001
Springer
15 years 7 months ago
Run-Time Bytecode Specialization
This paper describes a run-time specialization system for the Java language. One of the main difficulties of supporting the full Java language resides in a sound yet effective ma...
Hidehiko Masuhara, Akinori Yonezawa
157
Voted
ISHPC
1999
Springer
15 years 7 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier