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ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
15 years 6 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
CASES
2007
ACM
15 years 6 months ago
A simplified java bytecode compilation system for resource-constrained embedded processors
Embedded platforms are resource-constrained systems in which performance and memory requirements of executed code are of critical importance. However, standard techniques such as ...
Carmen Badea, Alexandru Nicolau, Alexander V. Veid...
CGO
2008
IEEE
15 years 4 months ago
Comprehensive path-sensitive data-flow analysis
Data-flow analysis is an integral part of any aggressive optimizing compiler. We propose a framework for improving the precision of data-flow analysis in the presence of complex c...
Aditya V. Thakur, R. Govindarajan
GECCO
2008
Springer
238views Optimization» more  GECCO 2008»
15 years 3 months ago
Using multiple offspring sampling to guide genetic algorithms to solve permutation problems
The correct choice of an evolutionary algorithm, a genetic representation for the problem being solved (as well as their associated variation operators) and the appropriate values...
Antonio LaTorre, José Manuel Peña, V...
CORR
2007
Springer
153views Education» more  CORR 2007»
15 years 2 months ago
Power-Bandwidth Tradeoff in Dense Multi-Antenna Relay Networks
— We consider a dense fading multi-user network with multiple active multi-antenna source-destination pair terminals communicating simultaneously through a large common set of K ...
Ozgur Oyman, Arogyaswami Paulraj