Sciweavers

309 search results - page 52 / 62
» Code Transformations for One-Pass Analysis
Sort
View
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
15 years 5 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
HVC
2005
Springer
97views Hardware» more  HVC 2005»
15 years 5 months ago
An Extensible Open-Source Compiler Infrastructure for Testing
Testing forms a critical part of the development process for large-scale software, and there is growing need for automated tools that can read, represent, analyze, and transform th...
Daniel J. Quinlan, Shmuel Ur, Richard W. Vuduc
ICS
1993
Tsinghua U.
15 years 3 months ago
The EM-4 Under Implicit Parallelism
: The EM-4 is a supercomputer that offers very fast inter processor communication and support for multi threading. In this paper we demonstrate that the EM-4, Together with an auto...
Lubomir Bic, Mayez A. Al-Mouhamed
82
Voted
CODES
2000
IEEE
15 years 3 months ago
On the roles of functions and objects in system specification
We present an analysis of the benefits and drawbacks of function and object based models in system specification. Functional models should be used for functional design space expl...
Axel Jantsch, Ingo Sander
ICS
2004
Tsinghua U.
15 years 5 months ago
Applications of storage mapping optimization to register promotion
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...
Patrick Carribault, Albert Cohen