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» Code compression for low power embedded system design
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DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 10 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
CASES
2006
ACM
15 years 10 months ago
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...
Lan S. Bai, Lei Yang, Robert P. Dick
TCSV
2002
103views more  TCSV 2002»
15 years 3 months ago
A scalable and programmable architecture for 2-D DWT decoding
The compression of still images by means of the discrete wavelet transform (DWT), adopted in the JPEG-2000 and MPEG-4 standards, is becoming more and more widespread because it yie...
Massimo Ravasi, L. Tenze, Marco Mattavelli
DCC
2000
IEEE
15 years 8 months ago
Multi-Resolution Adaptation of the SPIHT Algorithm for Multiple Description
Multiple description codes are data compression algorithms designed with the goal of minimizing the distortion caused by data loss in packet-based or diversity communications syst...
Nedeljko Varnica, Michael Fleming, Michelle Effros
GLVLSI
2007
IEEE
172views VLSI» more  GLVLSI 2007»
15 years 10 months ago
The effect of temperature on cache size tuning for low energy embedded systems
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for about 40% or more of the total energy consumed in t...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...