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» Code compression for low power embedded system design
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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 2 months ago
Security-Driven Exploration of Cryptography in DSP Cores
With the popularity of wireless communication devices a new important dimension of embedded systems design has arisen, that of security. This paper presents for the first time des...
Catherine H. Gebotys
PATMOS
2004
Springer
15 years 3 months ago
Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems
Portableembeddeddevicesmustpresentlyrunmultimediaandwireless network applications with enormous computational performance requirements at a low energy consumption. In these applica...
David Atienza, Stylianos Mamagkakis, Francky Catth...
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
15 years 2 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
CODES
2001
IEEE
15 years 1 months ago
System canvas: a new design environment for embedded DSP and telecommunication systems
We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specif...
Praveen K. Murthy, Etan G. Cohen, Steve Rowland
CODES
1998
IEEE
15 years 1 months ago
A hardware/software prototyping environment for dynamically reconfigurable embedded systems
Next generation embedded systems place new demands on an efficient methodology for their design and verification. These systems have to support interaction over a network, multipl...
Josef Fleischmann, Klaus Buchenrieder, Rainer Kres...