Sciweavers

346 search results - page 20 / 70
» Code compression for low power embedded system design
Sort
View
CASES
2007
ACM
15 years 1 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
ISLPED
1995
ACM
235views Hardware» more  ISLPED 1995»
15 years 1 months ago
Low power and EMI, high frequency, crystal oscillator
The high-frequency oscillator is one of the major causes of both high power consumption and high ElectroMagnetic Interference (EMI) in Embedded Systems (ES). This paper presents a...
Rafael Fried, Reuven Holzer
ICASSP
2008
IEEE
15 years 4 months ago
Transmit codes and receive filters for pulse compression radar systems
Pulse compression radar systems make use of transmit code sequences and receive filters that are specially designed to achieve good range resolution and target detection capabili...
Petre Stoica, Jian Li, Ming Xue
ISLPED
1999
ACM
137views Hardware» more  ISLPED 1999»
15 years 1 months ago
Energy-efficient design of battery-powered embedded systems
—Energy-efficient design of battery-powered systems demands optimizations in both hardware and software. We present a modular approach for enhancing instruction level simulators ...
Tajana Simunic, Luca Benini, Giovanni De Micheli
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 2 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell