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» Code compression for low power embedded system design
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ASYNC
2000
IEEE
86views Hardware» more  ASYNC 2000»
15 years 9 months ago
An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems
Self-timed systems often have to communicate with their environment through a clocked interface. For example, off-chip memory may require clocking and this can reduce the benefit...
George S. Taylor, Simon W. Moore, Steve Wilcox, Pe...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
15 years 10 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
SAMOS
2009
Springer
15 years 9 months ago
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey
The demands for high quality, real-time performance and multi-format video support in consumer multimedia products are ever increasing. In particular, the future multimedia systems...
Yahya Jan, Lech Józwiak
RTCSA
2005
IEEE
15 years 10 months ago
LyraNET: A Zero-Copy TCP/IP Protocol Stack for Embedded Operating Systems
Embedded systems are usually resource limited in terms of processing power, memory, and power consumption, thus embedded TCP/IP should be designed to make the best use of limited ...
Yun-Chen Li, Mei-Ling Chiang
CODES
2001
IEEE
15 years 8 months ago
A constraint-based application model and scheduling techniques for power-aware systems
New embedded systems must be power-aware, not just low-power. That is, they must track their power sources and the changingpower and performance constraints imposed by the environ...
Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh, Fadi ...