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» Code compression for low power embedded system design
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VTC
2010
IEEE
140views Communications» more  VTC 2010»
14 years 8 months ago
Superposition Coding Aided Bi-Directional Relay Transmission Employing Iteratively Decoded Self-Concatenated Convolutional Codes
— In this paper, we consider coding schemes designed for two nodes communicating with each other with the aid of a relay node, which receives information from the two nodes in th...
Muhammad Fasih Uddin Butt, Rong Zhang, Soon Xin Ng...
SAC
2009
ACM
15 years 2 months ago
Impact of function inlining on resource-constrained embedded systems
With the development of computer systems, function inlining schemes were used to reduce execution time while increasing codes. In embedded systems such as wireless sensor nodes, t...
Bongjae Kim, Sangho Yi, Yookun Cho, Jiman Hong
CASES
2006
ACM
15 years 3 months ago
Supporting precise garbage collection in Java Bytecode-to-C ahead-of-time compiler for embedded systems
A Java bytecode-to-C ahead-of-time compiler (AOTC) can improve the performance of a Java virtual machine (JVM) by translating bytecode into C code, which is then compiled into mac...
Dong-Heon Jung, Sung-Hwan Bae, Jaemok Lee, Soo-Moo...
CASES
2010
ACM
14 years 7 months ago
Real-time unobtrusive program execution trace compression using branch predictor events
Unobtrusive capturing of program execution traces in real-time is crucial in debugging cyber-physical systems. However, tracing even limited program segments is often cost-prohibi...
Vladimir Uzelac, Aleksandar Milenkovic, Martin Bur...
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
15 years 2 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...