Sciweavers

346 search results - page 38 / 70
» Code compression for low power embedded system design
Sort
View
ICA3PP
2010
Springer
15 years 2 months ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
104
Voted
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
15 years 1 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
72
Voted
ICIP
2000
IEEE
15 years 11 months ago
Optimal Design of Transform Coders and Quantizers for Image Classification
In a variety of applications (including automatic target recognition) image classification algorithms operate on compressed image data. This paper explores the design of optimal t...
Soumya Jana, Pierre Moulin
EMSOFT
2007
Springer
15 years 3 months ago
Methods for multi-dimensional robustness optimization in complex embedded systems
Design space exploration of embedded systems typically focuses on classical design goals such as cost, timing, buffer sizes, and power consumption. Robustness criteria, i.e. sensi...
Arne Hamann, Razvan Racu, Rolf Ernst
ANCS
2009
ACM
14 years 7 months ago
SPC-FA: synergic parallel compact finite automaton to accelerate multi-string matching with low memory
Deterministic Finite Automaton (DFA) is well-known for its constant matching speed in worst case, and widely used in multistring matching, which is a critical technique in high pe...
Junchen Jiang, Yi Tang, Bin Liu, Xiaofei Wang, Yan...