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CGO
2006
IEEE
15 years 9 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
100
Voted
CSFW
2006
IEEE
15 years 9 months ago
Encoding Information Flow in Haskell
This paper presents an embedded security sublanguage for enforcing information-flow policies in the standard Haskell programming language. The sublanguage provides useful informa...
Peng Li, Steve Zdancewic
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
15 years 9 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
PARELEC
2006
IEEE
15 years 9 months ago
Application-Driven Development of Concurrent Packet Processing Platforms
We have developed an application-driven methodology for implementing parallel and heterogeneous programmable platforms. We deploy our flow for network access platforms where we h...
Christian Sauer, Matthias Gries, Jörg-Christi...
121
Voted
ECLIPSE
2006
ACM
15 years 9 months ago
Guidance through active concerns
Producing usable documentation has always been a tedious task, and even communicating important knowledge about a system among collaborators is difficult. This paper describes an ...
Barthélémy Dagenais, Harold Ossher