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105
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ICFP
2003
ACM
15 years 11 months ago
Compiler implementation in a formal logical framework
The task of designing and implementing a compiler can be a difficult and error-prone process. In this paper, we present proach based on the use of higher-order abstract syntax and...
Jason Hickey, Aleksey Nogin, Adam Granicz
105
Voted
ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
14 years 11 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
FCCM
2007
IEEE
115views VLSI» more  FCCM 2007»
15 years 6 months ago
Generating FPGA-Accelerated DFT Libraries
We present a domain-specific approach to generate highperformance hardware-software partitioned implementations of the discrete Fourier transform (DFT) in fixed point precision....
Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryh...
LCTRTS
2010
Springer
15 years 6 months ago
Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
Minming Li, Chun Jason Xue, Tiantian Liu, Yingchao...
CODES
2009
IEEE
15 years 6 months ago
FlexRay schedule optimization of the static segment
The FlexRay bus is the prospective automotive standard communication system. For the sake of a high flexibility, the protocol includes a static time-triggered and a dynamic event...
Martin Lukasiewycz, Michael Glaß, Jürge...