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IPPS
2009
IEEE
15 years 4 months ago
Early experiences on accelerating Dijkstra's algorithm using transactional memory
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
Nikos Anastopoulos, Konstantinos Nikas, Georgios I...
SPAA
2004
ACM
15 years 3 months ago
A scalable lock-free stack algorithm
The literature describes two high performance concurrent stack algorithms based on combining funnels and elimination trees. Unfortunately, the funnels are linearizable but blockin...
Danny Hendler, Nir Shavit, Lena Yerushalmi
IPPS
2008
IEEE
15 years 4 months ago
Providing flow based performance guarantees for buffered crossbar switches
Buffered crossbar switches are a special type of combined input-output queued switches with each crosspoint of the crossbar having small on-chip buffers. The introduction of cross...
Deng Pan, Yuanyuan Yang
TCAD
2008
103views more  TCAD 2008»
14 years 9 months ago
Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
Rebecca L. Collins, Luca P. Carloni
ICIP
2004
IEEE
15 years 11 months ago
A novel 2D shape matching algorithm based on B-spline modeling
This paper presents a novel algorithm for 2D planar curve recognition based on B-Spline modeling. It combines the advantages of the B-Spline that are continuous curve representati...
Yue Wang, Eam Khwang Teoh