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TVLSI
2008
14 years 9 months ago
2008
Exact approaches to combinational equivalence checking, such as automatic test pattern generation-based, binary decision diagrams (BDD)-based, satisfiability-based, and hybrid appr...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
This paper presents a verification technique which is specifically targeted to formally comparing large combinational circuits with some structural similarities. The approach co...
DFT
2003
IEEE
15 years 2 months ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
The paper explores several ways to improve the speed and capacity of combinational equivalence checking based on Boolean satisfiability (SAT). State-of-the-art methods use simulat...
ICCD
2004
IEEE
15 years 6 months ago
2004
IEEE
— We propose an automatic test pattern generation (ATPG) framework for combinational threshold networks. The motivation behind this work lies in the fact that many emerging nanot...