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DATE
2007
IEEE
150views Hardware» more  DATE 2007»
15 years 11 months ago
A low-SER efficient core processor architecture for future technologies
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...
VISUALIZATION
2005
IEEE
15 years 10 months ago
Statistically Quantitative Volume Visualization
Visualization users are increasingly in need of techniques for assessing quantitative uncertainty and error in the images produced. Statistical segmentation algorithms compute the...
Joe Michael Kniss, Robert L. Van Uitert Jr., Abrah...
165
Voted
IPPS
1997
IEEE
15 years 9 months ago
Enhancing Software DSM for Compiler-Parallelized Applications
Current parallelizing compilers for message-passing machines only support a limited class of data-parallel applications. One method for eliminating this restriction is to combine ...
Peter J. Keleher, Chau-Wen Tseng
160
Voted
NIPS
2008
15 years 6 months ago
Nonrigid Structure from Motion in Trajectory Space
Existing approaches to nonrigid structure from motion assume that the instantaneous 3D shape of a deforming object is a linear combination of basis shapes, which have to be estima...
Ijaz Akhter, Yaser Sheikh, Sohaib Khan, Takeo Kana...
162
Voted
IJCAI
2003
15 years 6 months ago
Practical Partition-Based Theorem Proving for Large Knowledge Bases
Query answering over commonsense knowledge bases typically employs a first-order logic theorem prover. While first-order inference is intractable in general, provers can often b...
Bill MacCartney, Sheila A. McIlraith, Eyal Amir, T...