This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
A major research challenge in multi-agent systems is the problem of partitioning a set of agents into mutually disjoint coalitions, such that the overall performance of the system...
Tomasz P. Michalak, Jacek Sroka, Talal Rahwan, Mic...
Many threads packages have been proposed for programming wireless sensor platforms. However, many sensor network operating systems still choose to provide an eventdriven model, du...
Kevin Klues, Chieh-Jan Mike Liang, Jeongyeup Paek,...
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...