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» Combining Software and Hardware Verification Techniques
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FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
15 years 8 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
100
Voted
DATE
1998
IEEE
92views Hardware» more  DATE 1998»
15 years 6 months ago
Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques
A new approach for sequential circuit test generation is proposed that combines software testing based techniques at the high level with test enhancement techniques at the gate le...
Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis...
GEOINFORMATICA
2008
123views more  GEOINFORMATICA 2008»
15 years 1 months ago
Efficient Implementation Techniques for Topological Predicates on Complex Spatial Objects
Topological relationships like overlap, inside, meet, and disjoint uniquely characterize the relative position between objects in space. For a long time, they have been a focus of...
Reasey Praing, Markus Schneider
91
Voted
WSCG
2004
152views more  WSCG 2004»
15 years 3 months ago
Detection of Collisions and Self-collisions Using Image-space Techniques
Image-space techniques have shown to be very efficient for collision detection in dynamic simulation and animation environments. This paper proposes a new image-space technique for...
Bruno Heidelberger, Matthias Teschner, Markus H. G...
ISCA
2010
IEEE
219views Hardware» more  ISCA 2010»
15 years 7 months ago
Using hardware vulnerability factors to enhance AVF analysis
Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
Vilas Sridharan, David R. Kaeli