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» Combining Software and Hardware Verification Techniques
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107
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DAC
2005
ACM
16 years 2 months ago
Word level predicate abstraction and refinement for verifying RTL verilog
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
Himanshu Jain, Daniel Kroening, Natasha Sharygina,...
VMCAI
2010
Springer
15 years 11 months ago
Building a Calculus of Data Structures
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
Viktor Kuncak, Ruzica Piskac, Philippe Suter, Thom...
ASPDAC
2007
ACM
136views Hardware» more  ASPDAC 2007»
15 years 5 months ago
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
Georges G. E. Gielen
CAV
2009
Springer
184views Hardware» more  CAV 2009»
16 years 2 months ago
Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique
Abstract. We present a new technique called Monotonic Partial Order Reduction (MPOR) that effectively combines dynamic partial order reduction with symbolic state space exploration...
Vineet Kahlon, Chao Wang, Aarti Gupta
136
Voted
VLUDS
2010
184views Visualization» more  VLUDS 2010»
14 years 8 months ago
Advanced Visualization and Interaction Techniques for Large High-Resolution Displays
Large high-resolution displays combine the images of multiple smaller display devices to form one large display area. A total resolution that can easily comprise several hundred m...
Sebastian Thelen