266 search results - page 29 / 54 » Combining Software and Hardware Verification Techniques |
140
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COMPSAC
2002
IEEE
15 years 6 months ago
2002
IEEE
With computer systems becoming ever larger and more complex, the cost and effort associated with their construction is increasing and the systems are now sufficiently complex that...
125
Voted
LCPC
2009
Springer
15 years 6 months ago
2009
Springer
Abstract. Current hardware trends place increasing pressure on programmers and tools to optimize scientific code. Numerous tools and techniques exist, but no single tool is a pana...
EUROMICRO
1999
IEEE
15 years 6 months ago
1999
IEEE
This paper describes the DELFT-JAVA processor and the mechanisms required to dynamically translate JVM instructions into DELFT-JAVA instructions. Using a form of hardware register...
132
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MICRO
1994
IEEE
15 years 6 months ago
1994
IEEE
Numerical applications frequently contain nested loop structures that process large arrays of data. The execution of these loop structures often produces memory preference pattern...
110
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DDECS
2007
IEEE
15 years 8 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...