Sciweavers

266 search results - page 33 / 54
» Combining Software and Hardware Verification Techniques
Sort
View
CAV
2012
Springer
222views Hardware» more  CAV 2012»
13 years 4 months ago
Leveraging Interpolant Strength in Model Checking
Craig interpolation is a well known method of abstraction successfully used in both hardware and software model checking. The logical strength of interpolants can affect the quali...
Simone Fulvio Rollini, Ondrej Sery, Natasha Sharyg...
ICCAD
2001
IEEE
144views Hardware» more  ICCAD 2001»
15 years 10 months ago
Faster SAT and Smaller BDDs via Common Function Structure
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
ACSAC
2005
IEEE
15 years 7 months ago
Stealth Breakpoints
Microscopic analysis of malicious code (malware) requires the aid of a variety of powerful tools. Chief among them is a debugger that enables runtime binary analysis at an instruc...
Amit Vasudevan, Ramesh Yerraballi
EMSOFT
2008
Springer
15 years 3 months ago
Randomized directed testing (REDIRECT) for Simulink/Stateflow models
The Simulink/Stateflow (SL/SF) environment from Mathworks is becoming the de facto standard in industry for model based development of embedded control systems. Many commercial to...
Manoranjan Satpathy, Anand Yeolekar, S. Ramesh
ICCD
2003
IEEE
123views Hardware» more  ICCD 2003»
15 years 10 months ago
Simplifying SoC design with the Customizable Control Processor Platform
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...
C. Ross Ogilvie, Richard Ray, Robert Devins, Mark ...