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» Combining optimizations in automated low power design
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DAC
2002
ACM
15 years 10 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
DAC
2003
ACM
15 years 10 months ago
Extending the lifetime of a network of battery-powered mobile devices by remote processing: a markovian decision-based approach
This paper addresses the problem of extending the lifetime of a batterypowered mobile host in a client-server wireless network by using task migration and remote processing. This ...
Peng Rong, Massoud Pedram
ISLPED
2009
ACM
97views Hardware» more  ISLPED 2009»
15 years 4 months ago
A high-performance low-power nanophotonic on-chip network
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfer, limits the...
Zheng Li, Jie Wu, Li Shang, Alan R. Mickelson, Man...
ISQED
2008
IEEE
118views Hardware» more  ISQED 2008»
15 years 4 months ago
A Thermal-Friendly Load-Balancing Technique for Multi-Core Processors
In multi-core processors there are several ways to pair a thread to a particular core. These load-balancing techniques result in a quite different power, performance and thermal b...
Enric Musoll
LCPC
2005
Springer
15 years 3 months ago
Compiler Supports and Optimizations for PAC VLIW DSP Processors
Abstract. Compiler is substantially regarded as the most essential component in the software toolchain to promote a successful processor design. This paper describes our preliminar...
Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Y...