Sciweavers

838 search results - page 117 / 168
» Combining optimizations in automated low power design
Sort
View
ARITH
2005
IEEE
15 years 3 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
ISCA
2011
IEEE
271views Hardware» more  ISCA 2011»
14 years 1 months ago
CRIB: consolidated rename, issue, and bypass
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
Erika Gunadi, Mikko H. Lipasti
CCGRID
2008
IEEE
15 years 4 months ago
Optimized Distributed Data Sharing Substrate in Multi-core Commodity Clusters: A Comprehensive Study with Applications
Distributed applications tend to have a complex design due to issues such as concurrency, synchronization and communication. Researchers in the past have proposed abstractions to ...
Karthikeyan Vaidyanathan, Ping Lai, Sundeep Narrav...
86
Voted
ASPLOS
2010
ACM
15 years 1 months ago
A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing
We present an all-optical approach to constructing data networks on chip that combines the following key features: (1) Wavelengthbased routing, where the route followed by a packe...
Nevin Kirman, José F. Martínez
ICRA
2006
IEEE
114views Robotics» more  ICRA 2006»
15 years 3 months ago
Blades: a New Class of Geometric Primitives for Feeding 3D Parts on Vibratory Tracks
Abstract— The vibratory bowl feeder remains the most common approach to the automated feeding (orienting) of industrial parts. We study the algorithmic design of devices on the b...
Onno C. Goemans, Kenneth Y. Goldberg, A. Frank van...