838 search results - page 120 / 168 » Combining optimizations in automated low power design |
ISLPED
2005
ACM
15 years 3 months ago
2005
ACM
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniproc...
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
— Long distance, low data-rate UWB communication for sensor network applications requires a highly energy efficient transceiver combined with circuit and system-level optimizati...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
BMCBI
2007
14 years 9 months ago
2007
Background: New high throughput pyrosequencers such as the 454 Life Sciences GS 20 are capable of massively parallelizing DNA sequencing providing an unprecedented rate of output ...
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...