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» Combining optimizations in automated low power design
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PIMRC
2008
IEEE
15 years 4 months ago
Concurrent and parallel transmissions are optimal for low data-rate IR-UWB networks
— The Internet of Things, emerging pervasive and sensor networks are low data-rate wireless networks with, a priori, no specific topology and no fixed infrastructure. Their pri...
Jean-Yves Le Boudec, Ruben Merz
CODES
2003
IEEE
15 years 2 months ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel
FORMATS
2009
Springer
15 years 4 months ago
Exploiting Timed Automata for Conformance Testing of Power Measurements
For software development, testing is still the primary choice for investigating the correctness of a system. Automated testing is of utmost importance to support continuous integra...
Matthias Woehrle, Kai Lampka, Lothar Thiele
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
15 years 6 months ago
CMOS Comparators for High-Speed and Low-Power Applications
— In this paper, we present two designs for CMOS comparators: one which is targeted for high-speed applications and another for low-power applications. Additionally, we present h...
Eric Menendez, Dumezie Maduike, Rajesh Garg, Sunil...
DAC
2003
ACM
15 years 10 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...