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» Combining optimizations in automated low power design
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ISLPED
2003
ACM
83views Hardware» more  ISLPED 2003»
15 years 3 months ago
Leakage power modeling and optimization in interconnection networks
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
Xuning Chen, Li-Shiuan Peh
JCP
2007
94views more  JCP 2007»
14 years 9 months ago
Low-Complexity Analysis of Repetitive Regularities for Biometric Applications
— Presented in this paper is a joint algorithm optimization and architecture design framework for analysis of repetitive regularities. Two closely coupled algorithm optimization ...
Lei Wang, Niral Patel
ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
15 years 6 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...
ICCAD
2009
IEEE
93views Hardware» more  ICCAD 2009»
14 years 7 months ago
An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs
Power gating has been a very effective way to reduce leakage power. One important design issue for a power gating design is to limit the surge current during the wakeup process. N...
Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Ch...
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 2 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi