838 search results - page 52 / 168 » Combining optimizations in automated low power design |
ISCAS
1999
IEEE
15 years 2 months ago
1999
IEEE
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
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ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
ARITH
2005
IEEE
15 years 3 months ago
2005
IEEE
The pipelined CORDIC with linear approximation to rotation has been proposed to achieve reductions in delay, power and area; however, the schemes for rotation (multiplication) and...
DFT
2004
IEEE
15 years 1 months ago
2004
IEEE
This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
SIGMETRICS
2008
ACM
14 years 9 months ago
2008
ACM
Significant opportunities for power optimization exist at application design stage and are not yet fully exploited by system and application designers. We describe the challenges ...