838 search results - page 56 / 168 » Combining optimizations in automated low power design |
ICCAD
1994
IEEE
15 years 1 months ago
1994
IEEE
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
DAC
2009
ACM
15 years 10 months ago
2009
ACM
Power and performance benefits of scaling are lost to worst case margins as uncertainty of device characteristics is increasing. Adaptive techniques can dynamically adjust the mar...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
This paper presents a technique for preprocessing combinational logic before technology mapping. The technique is based on the representation of combinational logic using And-Inve...
APCCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
—The operating principle of MOS FETs AC/DC rectifier for passive RFID transponder is introduced and the power dissipation of MOS rectifier operating with 902M-928MHz industrial, ...
KES
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. An energy-efficient power-aware design is highly desirable for digital signal processing functions that encounter a wide diversity of operating scenarios in battery-power...