838 search results - page 57 / 168 » Combining optimizations in automated low power design |
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
WOWMOM
2005
ACM
15 years 3 months ago
2005
ACM
— We consider the design of optimal strategies for joint power adaptation, rate adaptation and scheduling in a multi-hop wireless network. Most existing strategies control either...
HPCA
2008
IEEE
15 years 10 months ago
2008
IEEE
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Our target is automation of analog circuit's layout, which is a bottleneck in mixed-signal's design. We formulate the layout explicitly considering manufacturing process...