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» Combining optimizations in automated low power design
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DAC
2004
ACM
15 years 10 months ago
Post-layout logic optimization of domino circuits
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
Aiqun Cao, Cheng-Kok Koh
ISLPED
1999
ACM
143views Hardware» more  ISLPED 1999»
15 years 2 months ago
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
Kanad Ghose, Milind B. Kamble
FPL
2006
Springer
223views Hardware» more  FPL 2006»
15 years 1 months ago
From Equation to VHDL: Using Rewriting Logic for Automated Function Generation
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
Carlos Morra, M. Sackmann, Sunil Shukla, Jürg...
GLOBECOM
2007
IEEE
15 years 4 months ago
Impact of Correlation on Linear Precoding in QSTBC Coded Systems with Linear MSE Detection
— In this paper, we study a wireless multiple-input multiple-output system in a Rayleigh flat-fading environment with correlation among the transmit antennas. We assume that the...
Aydin Sezgin, Arogyaswami Paulraj, Mai Vu
PIMRC
2008
IEEE
15 years 4 months ago
Designing PSAM schemes: How optimal are SISO pilot parameters for spatially correlated SIMO?
Abstract-We study the design parameters of pilot-symbolassisted modulation (PSAM) schemes for spatially correlated single-input multiple-output (SIMO) systems in time-varying Gauss...
Xiangyun Zhou, Tharaka A. Lamahewa, Parastoo Sadeg...