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» Combining optimizations in automated low power design
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DATE
2010
IEEE
166views Hardware» more  DATE 2010»
15 years 2 months ago
From transistors to MEMS: Throughput-aware power gating in CMOS circuits
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
Michael B. Henry, Leyla Nazhandali
CORR
2008
Springer
129views Education» more  CORR 2008»
14 years 10 months ago
Combining Beamforming and Space-Time Coding Using Noisy Quantized Feedback
The goal of combining beamforming and space-time coding is to obtain full-diversity order and to provide additional received power (array gain) compared to conventional space-time...
Siavash Ekbatani, Hamid Jafarkhani
PATMOS
2004
Springer
15 years 3 months ago
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...
Geoff V. Merrett, Bashir M. Al-Hashimi
SIPS
2006
IEEE
15 years 3 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie